Catch hardware mistakes before fabrication

Runs locally No cloud required No account required Apache 2.0 licensed

Architon checks KiCad hardware designs for voltage, power, and interface mismatches before they become board re-spins.

KiCad project data Runs locally Deterministic rules
-zsh Architon CLI
$ rv scan .
→ scanning project.net
→ discovered .architon/meta.yaml
→ propagating voltages from sources...

info VBAT = 24.0V (source)
info +5V = 5.0V (U3 regulator out)

RULE_OVERVOLTAGE
component: U1 (TI TMS320F2837xD)
net: VBAT → 24.0V
max: 5.5V
margin: −18.5V

1 violation found · exit code 2

# CI pipeline stops. Board spin avoided.

Runs locally on KiCad project data and blocks architecture violations before fabrication.

CI: FAIL · 1 violation
DRC: PASS
build blocked before fab
Apache 2.0 · open source core
CI-native · exit codes 0-3
Deterministic · rule-based checks
KiCad · BOM · netlist import

Try it in 30 seconds

Runs locally. No account required.

git clone https://github.com/badimirzai/architon-cli
cd architon-cli/examples
rv scan .
View example projects

Example hardware projects used for testing and demonstration.


How Architon checks hardware designs

What Architon catches

Architon is built for architecture-level mistakes that can survive normal schematic and PCB checks.

Voltage compatibility

Traces voltages from sources through regulators across your full netlist. Flags rails that exceed component input limits.

Interface compatibility

Checks module and logic-level assumptions so connected interfaces agree on voltage ranges and electrical limits.

Power assumptions

Aggregates current draw estimates per rail. Catches designs where load or stall current exceeds regulator, source, or driver limits.

CI integration

Exit codes 0-3. Drop rv scan . into GitHub Actions and block merges on architecture violations, not just linting.

KiCad native

Reads .net and BOM exports directly. Auto-discovers project structure. Designed to run on real KiCad projects, not toy demos.

Bus conflicts

Flags shared-bus integration issues such as address conflicts and incompatible assumptions between connected devices.


What problem Architon solves

DRC checks geometry.
Architon checks system assumptions.

PCB DRC catches layout and manufacturing rule violations. ERC catches basic schematic electrical issues. Architon checks cross-component and cross-board integration assumptions before they become bring-up failures.

Architon complements KiCad, Altium, ERC, DRC, and SPICE by checking the system assumptions that sit above individual schematic, layout, and simulation views.

EDA checks
PCB DRC / schematic ERC
DRC catches PCB and layout rule violations. ERC catches schematic electrical-rule issues such as pin types and unconnected nets.
✓ Copper clearances

✓ Pin-type and connectivity issues

✗ Cross-component voltage compatibility

✗ Unsafe rail assumptions

✗ Cross-board interface mismatches
architon
Architecture-level integration verification
Reads KiCad netlists and hardware project data, propagates rails, and checks whether connected components and boards agree on voltage, power, and interfaces.
✓ Voltage incompatibility

✓ Power budget violations

✓ Interface mismatches

✓ Current budget issues

✓ Bus and address conflicts

Verification coverage

ERC and DRC remain necessary. Architon adds deterministic checks for cross-component and cross-board assumptions before fabrication.

Check EDA ERC/DRC Architon
Unconnected pins
Copper clearance / layout rules
Cross-component voltage compatibility
Power budget limits
Interface and bus conflicts
CI failure before fabrication Not native

Example: an MPU-6050 IMU and DS3231 RTC sharing address 0x68 can pass normal layout checks but fail during bring-up.


How it works

From netlist to violation in seconds

No cloud. No account. Runs locally on your hardware project directory. No design data leaves your machine.

Typical use cases

01

Install and point at your project

Install the rv binary via Go. Run rv scan . in any directory containing a KiCad .net file.

go install github.com/badimirzai/architon-cli/cmd/rv@latest
02

Architon generates a meta skeleton

On first run, Architon auto-discovers your netlist and creates a .architon/meta.yaml skeleton for project-specific assumptions that cannot be inferred from your BOM.

Created .architon/meta.yaml
03

Scan runs deterministic rules

Architon propagates voltages through regulators, checks each net against component max ratings, and applies rule modules for motors, power, and logic interfaces. No probabilistic inference. Same input → same output, every time.

exit 0 · exit 1 · exit 2
04

Block CI on violations

Exit code 2 stops the build. Violations include net name, component reference, measured voltage, rated maximum, and margin. The team sees the failure before anyone orders boards.

rv scan . ← GitHub Actions
$ go install github.com/badimirzai/architon-cli/cmd/rv@latest

See the failure mode, then try it on your own design flow.